產(chǎn)品概述
2x2 MIMO | NVIDIA Jetson TX2 | Xilinx Artix 7 200T
The Artificial Intelligence Radio Transceiver 7201 is a high-performance, GPU enabled software defined radio with an increased FPGA capability. Equipped with the Xilinx Aritix 200T FPGA, The AIR7201 has 4x more FPGA resources compared to the AIR7101.
300MHz – 6 GHz | 215,360 FPGA Logic Cells | 740 DSP slices | Memory 12,140
技術(shù)參數(shù)
模型 Xilinx Artix-7 LUT 75.5k DSP Slices 740 內(nèi)存 12.14 kbits 射頻收發(fā)器 模型 ADI 9371 接收通道數(shù) 2 發(fā)射通道數(shù) 2 帶寬 112.5兆赫 采樣率 125 MSPS 頻率調(diào)諧范圍 300 MHz-6 GHz 接收器功率電平控制 AGC或手動增益控制 發(fā)射器功率電平控制 TPC或手動增益控制 外部基準輸入 是 內(nèi)置校準 正交誤差校正 LO抑制
LO泄漏校正
處理器 模型 NVIDIA Jetson TX2 CPU 1 ARM A-57（4核） CPU 2 ARM Denver2（2核） 顯卡 Pascal（256核） 記憶 8 GB共享內(nèi)存 存儲 32 GB閃存 接口 SATA硬盤 版本3.1 SD卡 2 TB的SD 3.0或SD-XC卡 USB USB 3.0高速模式（5Gb / s）
USB 2.0高速模式（480Mb / s），
USB On-The-Go
UART，GPIO，SPI，I2C，音頻有關(guān)信息，請參見NVIDIA Jetson TX2數(shù)據(jù)表。 產(chǎn)品概述
AirStack Sandbox is an FPGA development kit for customers to deploy their own intellectual property (IP) on the AIR-T‘s FPGA. The Deepwave team has abstracted away all of the complications of writing custom firmware and has now enabled our customers to interact with the FPGA in an extremely simplified interface. Board specific system management (power, clocking, timing, and bus architecture) are handled by Deepwave developers in the Sandbox software. Customers can immediately utilize FPGA computational resources without the long initial development times typical of bringing up an entire system. With Sandbox + AirStack, the full power of the AIR-T’s FPGA, GPU, and CPUs are now at your disposal. Customers are able to insert their own IP cores into the FPGA for their own application which may include Custom signal processing blocks, Communication physical layers, Pre-processing for deep learning applications, or Feature extraction.
AIR-T's Memory Architecture
AIR-T's Unique Memory Architecture
The figure to the right shows the unique shared memory architecture of the AIR-T product line. With the AIR-T, the GPU and CPU share the same memory allowing for signal data to be equally accessible to both compute resources. The signal data is transferred to/from this shared memory using the DMA engine included in Sandbox.
SDR Memory Architecture
Traditional SDR Memory Architecture
This is in contrast to a traditional software defined radio shown to the left. In typical SDR systems, the GPU and CPU are only connected by a PCI express bus requiring an extra memory copy of the signal data to access the GPU compute resource. This extra copy adds significant latency to the application. The presence of the GPU / CPU shared memory on the AIR-T allows for applications to operate with reduce latency while still leveraging the compute power of the GPU. By combining the AIR-T hardware, AirStack, and AirStack Sandbox, Deepwave offers the only SDR with combined FPGA, GPU, and CPU in a fully reconfigurable infrastructure.
AI SDR 人工智能軟件無線電 Deepwave
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- 產(chǎn)品型號：人工智能軟件無線電
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